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Volume-1 Issue-8

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Volume-1 Issue-8, July 2013, ISSN: 2319–6386 (Online)
Published By: Blue Eyes Intelligence Engineering & Sciences Publication Pvt. Ltd. 

Page No.



Ashish Dixit, R. K. Singh

Paper Title:

An Innovative Optical Transreciever Architecture for High Speed Data Interconnectivity Using CMOS IC for Optical Interconnects

Abstract: The high cost of the opto-electronics components which are typically used for the long-haul communication is prohibitive in the Fiber to the Home and Passive Optical Networks. This cost prone limitation can be easily optimized to some extent by reducing the cost of the electronics components used in the design of the transceiver and thereby, reducing the packaging cost. The ICs are designed in house and fabricated on a standard CMOS wafer with 0.18µm technology. These devices can operate at 1.8V and are low power in nature, thus reducing the demand on power dissipation. The transceiver module consists of an un-cooled and direct modulated laser diode driven, a high speed PIN photo-diode with amplifier and CMOS ICs. The CMOS ICs are attached on a transceiver substrate that is compliant with the small form-factor pluggable package multisource agreement and coupled to a 1310nm FP laser TOSA and a PIN ROSA with LC connector. This integrated transceiver is characterized up to 2.5-Gbps and can be applied in the high speed data transfer rate. The interconnect architectures which leverage high-bandwidth optical channels offer a promising solution to address the increasing chip-to-chip I/O bandwidth demands from the end user. A low-voltage integrating and double-sampling optical transreceiver’s front-end provides an adequate sensitivity in terms of power efficient simply, by avoiding linear high-gain elements common in conventional transimpedance amplifier. The phenomenon of clock recovery is performed with a dual-loop architecture which employs the baud-rate phase detection and feedback interpolation so as to achieve the reduced power consumption, while high-precision phase spacing is ensured at both the transmitter and receiver end through adjustable delay clock buffers. The increase in computing power enabled by CMOS scaling has created an increased demand for chip-to-chip I/O bandwidth. Unfortunately, the inter-chip electrical channel bandwidth has not scaled similarly to on-chip performance, causing current high-speed I/O link design to be channel limited that require sophisticated equalization circuitry which in turn increases the power consumption.

Keywords: 2.5-Gbps SFP, optical transceiver, 0.18µm CMOS technology, FTTH, GPON, Clock and data recovery, equalization, laser driver, optical interconnects, optical receiver, serial transceiver, VCSEL, 1.25G 1310nm optic transceiver; SFP; Signal Integrity; Circuit design, SDH, SONET, FEC, OTN.


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2.        Yong-Hun Oh*, Quan Le*, Sang-Gug Lee*, Nguyen Duy Bien Yen*, Ho-Yong Kang**, and Tae-Whan Yoo**, “Burst-mode Transmitter for 1.25-Gbps Ethernet PON Applications,” 2004 IEEE.

3.        Quan Le, Student Member, IEEE, Sang-Gng Lee, Yong-Hun Oh, Ho-Yong Kang, and Tae-Hwan Yoo, “A Burst-Mode Receiver for 1.25-Gb/s Ethernet PON With AGC and Internally Created Reset Signal”. IEEE Journal of Solid-State Circuits, vol. 39, no. 12, December 2004. 

4.        Jin-Wook Kwon, Joong-Hee Lee, Member, IEEE, Jae-    Myung Baek, Joo-Chul Cho, Ja-Won Seom Sung-Soo Park, Jung-Kee Lee, Yun-Kyung Oh, and Dong-Hoon Jang, “AC-    Coupled Burst-Mode OLT SFP Transceiver for Gigabit    Ethernet PON Systems,” IEEE Photonics Technology Letters, vol. 17, no.7, July 2005.

5.        Interfacing Maxim Laser Drivers and Laser diodes Application Note: HFAN-2.0 [1] “IEEE Standard 802.3AQ-2006, Physical Layer and Management Parameters for 10Gb/s Operation, Type 10GBASE-LRM,” Sept. 2006.

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14.     N. L. Swenson, P. Voois, T. Lindsay, and S. Zeng, “Standards compliance testing of optical transmitters using a software-based equalizing reference receiver,” Optical Fiber Communication Conference and Exposition and The National Fiber Optic Engineers Conference on CD-ROM (Optical Society of America, Washington, DC), Feb. 2007.

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18.     D. M. Kuchta et al., “120-Gb/s VCSEL-based parallel-optical inter-connect and custom 120-Gb/s testing station,” J. Lightw. Technol., vol. 22, no. 9, pp. 2200–2212, Sep. 2004.

19.     L. Schares et al., “Terabus: Terabit/second-class card-level optical in-terconnect technologies,” IEEE J. Sel. Topics Quantum Electron., vol. 12, no. 5, pp. 1032–1044, Sep./Oct. 2006.

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26.     D. Bossert et al., “Production of high-speed oxide confined VCSEL arrays for datacom applications,” Proc. SPIE, vol. 4649, pp. 142–151, Jun. 2002.

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28.     Y. Liu et al., “Numerical investigation of self-heating effects of oxide-confined vertical-cavity surface-emitting lasers,” IEEE J. Quantum Electron., vol. 41, no. 1, pp. 15–25, Jan. 2005.

29.     S. A. Blokhin et al., “Vertical-cavity surface-emitting lasers based on submonolayer InGaAs quantumdots,” IEEE J.QuantumElectron., vol. 42, no. 9, pp. 851–858, Sep. 2006.

30.     M. A.Wistey et al., “GaInNAsSb/GaAs vertical cavity surface emitting lasers at 1534 nm,” Electron. Lett., vol. 42, no. 5, pp. 282–283, Mar. 2006.

31.     M. Yang et al., “A high-speed, high-sensitivity silicon lateral trench photodetector,” IEEE ElectronDevice Lett., vol. 23, no. 7, pp. 395–397, Jul. 2002.

32.     M. R. Reshotko, D. L.Kencke, and B. Block, “High-speed CMOS compatible photodetectors for optical interconnects,” Proc. SPIE, vol. 5564, pp. 146–155, Oct. 2004.

33.     Rajinder Tiwari, R. K. Singh  and  Ganga Ram Mishra.  “A New Approach for Design of CMOS Based Cascode Current Mirror for ASP Applications ” International Journal of Electronics & Communication Engineering & Technology (IJECET). May–July 2011. 2(2).,01–07p.  ISSN 0976–6464 (Print) & ISSN 0976–6472 (Online).

34.     Rajinder Tiwari  and  R. K. Singh. “An Overview of the Technical Development of the Current Mirror used in Analog CMOS Circuits” International Journal of Microcircuits and Electronics (IJME).  2012.  3(1).  15–26p. ISSN 0974–2204.

35.     Rajinder Tiwari, R. K. Singh  and  Ganga Ram Mishra.  “Technical Developments and Application of Nanoscale MOSFET in Analog CMOS Circuits: A Brief Review” Journal of Physical Sciences (An International Research Journal of Physical Sciences). 2010.  2(1).  143–149p. ISSN: 0975–5519.

36.     Rajinder Tiwari, R. K. Singh “An Innovative Approach of the Analysis of the Low Noise of a CMOS Based Amplifier for Analog Signal Based Applications” Journal of VLSI Design Tools and Technology (JVDTT), Volume 2 No. 3 (Dec, 2012),  pp 01 – 09 with ISSN: 2249 – 474X.

37.     Rajinder Tiwari, R. K. Singh “A Novel High Performance CMOS Cascoded Operational Amplifier for Process Instrumentation Based Applications” International Journal of Recent Trends in Engineering & Technology (IJRTET), Volume 7 No. 2 (March 2012),  pp 77 – 81 with ISSN: 2158 – 5555 (Print), ISSN: 2158 – 5563 (Online).

38.     Rajinder Tiwari, R. K. Singh “An Innovative Approach of Implementation of High Performance Low Voltage Amplifier for Biomedical Applications” International Journal of Technology & Science (IJTS), Volume 2 Issue 3 (March – May, 2012),  pp 09 - 14  with ISSN 2277- 1905 (Print).

39.     Rajinder Tiwari, R. K. Singh “An Optimized High Speed Dual Mode CMOS Differential Amplifier for Analog VLSI Applications” International Journal of Electrical Engineering and Technology (IJEET), Volume 3 Issue 1 (January- June 2012),  pp 165 – 172 with ISSN 0976- 6545 (Print) & ISSN 0976 – 6553 (Online).

40.     Rajinder Tiwari, R. K. Singh “An Innovative Approach of High Performance CMOS Current Conveyor - II for Analog Signal Processing Applications” International Journal of Computer Engineering & Technology (IJCET), Volume 3 Issue 1 January- June (2012),  pp 147 – 153 with ISSN 0976- 6367 (Print) & ISSN 0976 – 6375 (Online).






Vaibhav Neema, Pratibha Gupta

Paper Title:

Design Strategy for Barrel Shifter Using Mux at 180nm Technology Node

Abstract: The reversible logic has the promising applications in emerging computing paradigm such as quantum computing, quantum dot cellular automata, optical computing, etc. In reversible logic gates there is a unique one-to-one mapping between the inputs and outputs. Barrel shifter is an integral component of many computing systems due to its useful property that it can shift and rotate multiple bits in a single cycle. The design methodologies considered in this work targets 1.) Reversible logical right shifter, 2.) Reversible universal right shifter that supports logical right shift, arithmetic right shift and the right rotate, 3.) Reversible bidirectional logical shifter, 4.)Reversible bidirectional arithmetic and logical shifter, 5) Reversible universal bidirectional shifter that supports bidirectional logical and arithmetic shift and rotate operations.

Low power, Power Dissipation.


1.        Behzad Razavi, “Design of Analog CMOS Integrated Circuit”, Tata McGraw Hill Edition, year 2002.
2.        Illa Gupta, Neha Arora, and Prof. B.P. Singh, “Simulation and analysis of 2:1 mux in 90nm technology,” IJMER, Vol. 1, Issue.2,pp-642-646, ISSN:2249-6645.

3.        Kevin P. Acken, Mary jane Irwin and Robert M. Owens “Power comparisons for barrel shifters”, in IEEE 12-12 aug 1996.

4.        Kiseon Cho and Minkyu Song, “Design Methodology of 32-bit Arithmetic Logic Unit with an Adaptive Leaf Cell Based Layout Technique” VLSI Design, 2002 Vol. 14 (3), pp. 527-536.

5.        Low power VLSI Design and Technology- G. K. Yeap, F. N. Majm, WSPC.

6.        Michael J. Schulte and E. George Walters III, “Design alternatives for barrel shifters,” Proc. SPIE Advanced Signal Processing Algorithms, Architectures, and Implementations, pp. 436-447, 2002.

7.        Philip E. Allen and Douglass R. Holberg,”CMOS Analog Circuit Design”, International 2nd edition, Oxford University Press.

8.        Pilmeier, Mathew Rudolf, “Barrel Shifter Design, Optimization and Analysis,” in Lehigh University jan. 2002.

9.        Priyanka Mandal, Siddhant Malani and P. M. Palsodkar, “VLSI Implementation of Barrel Shifter”, Proceedings of SPIT-IEEE Colloquium and International conference, Mumbai, India.
10.     Rinu Pappachan,V.Vijaykumar, T. Ravi and V. Kannan, “Design and Analysis of 4-Bit Low-Power Barrel Shifter in 20nm FINFET Technology”, IJES, Volume-2, Issue-3, pp.17-25, 2013.
11.     Saurabh Kotiyal, “Design Methodology for Reversible Logic Based Barrel Shifters,” University of South Florida, in year 2012.

12.     Shen-fu Hsiao, Jia-Stang Yeh, and Da-Yen Chen, “High Performance Multiplexer Based Logic Synthesis Using Pass-transistor Logic”, Taylor & francis Gropu, VLSI Design, vol. 15(1), pp. 417-426, in year 2002.

13.     Website:  http://en.wikipedia.org/wiki/Arithmetic_shift.






N. Snehalatha, S. Angeline Julia, Paul Rodrigues

Paper Title:

Survey of Bandwidth Management Techniques

Abstract: Today in the modern communication world, the traffic that exists in the internet is becoming more and more abnormal. This was mainly due to increase in the number of users day by day which results in bandwidth congestion, poor response time for end users. The most efficient solution to this problem to manage and allocate the existing bandwidth almost equally using suitable queuing disciplines and filters that exist as quality of service. It is a full featured technology which may reduce the cost and improve the network performance. This study comprehensively surveys various bandwidth management techniques. This paper gives the brief overview of bandwidth management system and bandwidth management techniques.

 Bandwidth, techniques, parameter.


1.        N. Basher, A. Mahanti, A. Mahanti, C.Williamson, and M. Arlitt, “A comparative analysis of web and peer-to-peer traffic,” in WWW ’08: Proceeding of the 17th international conference on World Wide Web. ACM, 2008, pp. 287–296.
2.        H. yun Wei, Y. dar Lin, N. Chiao, and T. University, “A survey and measurement-based comparison of bandwidth management techniques,” IEEE Communications Surveys and Tutorials,vol. 5, p. 2003.

3.        E. Bowen, C. Jeffries, L. Kencl, A. Kind, and R. Pletka, “Bandwidth allocation for nonresponsive flows with active queue management,” Broadband Communications, 2002. Access,Transmission, Networking. 2002 International Zurich Seminar on, pp. 13–1–13–6, 2002.

4.        G. Dias and C. Gunaratne, “Using dynamic delay pools for bandwidth management,” Proceedings of the 7th International Workshop on Web Content Caching and Distribution,Boulder, Colorado, August 2002.

5.        J. Valenzuela, A. Monleon, I. S. Esteban, M. Portoles, and O. Sallent, “A hierarchical token bucket algorithm to enhance qos in ieee 802.11: proposal, implementation and evaluation,”Vehicular Technology Conference, 2004. VTC2004-Fall. 2004 IEEE 60th, vol. 4, pp. 2659–2662 Vol. 4, Sept. 2004.






K. Shivanarayana, G. Anil, K. Srividya Savitri

Paper Title:

Simulation of Four Quadrant Operation & Speed Control of BLDC Motor on Matlab / Simulink

Abstract: BLDC motors have been gaining attention from various Industrial and household appliance manufacturers, because of its high efficiency, high power density and low maintenance cost.  After many research and developments in the fields of magnetic materials and power electronics, their applications to electric drives have increased to a significant extent. In this paper, the modeling of Brushless DC motor drive system along with control system for speed and current has been presented using MATLAB/ SIMULINK. In order to evaluate the model, various cases of simulation studies are carried out. Test results thus obtained show that, the model performance is satisfactory.



1.        P.Pillay and R.Krishnan, “Modeling, simulation and analysis of permanent-magnet motor drives, part-II: the brushless DC motor drives,” IEEE Trans. on Industry Applications, vol. 25, pp.274-279, March/April 1989.
2.        S.K.Safi, P.P.Acarnley and A. G. Jack. “Analysis and simulation of the high-speed torque performance of brushless DC motor drives,” Proc. Of IEE, vol 142, no.3, p.p.191-200, May 1995.

3.        Krishnan R motor “Drives Modeling, Analysis and Control”, Prentice Hall of India, First Edn, 2002, Chapter 9, pp 513-615..

4.        Byoung-Kuk Lee and Mehrdad Ehsani, “Advanced Simulation Model for Brushless DC Motor Drives”, Electric Power Component And Systems, 31:841-868, 2003.

5.        Dr.B.Singh, Prof B P Singh and C. L. Putta Swamy,“Modelling of Variable Structure Controlled Permanent Magnet Brushless dc Motor”, IE(I)_Journal-EL, Vol 75, Febraury 1995.

6.        Gopal K Dubey “Fundamentals of Electrical Drives”, Narosa Publishing House, New Delhi, Second Edn, 2001, Chapter 7, pp271-277.

7.        Bimal K Bose, “Modern Power Electronics and AC Drives”, Pearson Education Publications, New Delhi, 2002, Chapter 9, pp483 - 495.

8.        Tae-Hyung Kim et al, IEEE publication no. 0-7803-7768-0/03.






Everette Adams, Shaoliang Jia

Paper Title:

An Overview of Estimation Methods within Wireless Sensor Networks

Abstract: This paper is a review of some publications that considered estimation issues within wireless sensor networks. Byzantine attacks on sensors, sensor position uncertainty, and calculation error times are some of the issues that falsify data within a wireless sensor network. Therefore, the implementation of new systematic methods that outperformed previous methods solved each estimation issue as described.

Binary Symmetric Channel (BSC), Byzantine Attack, Cramer-Rao Lower Bound (CRLB), Weighted Average (WA).


1.        Z. X. Luo, “Anti-attack and Channel Aware Target Localization in Wireless Sensor Networks Deployed in Hostile Environments”, International Journal of Engineering and Advanced Technology, vol. 1, no. 6, Aug. 2012.
2.        Z. X. Luo, “Modeling Sensor Position Uncertainty for Robust Target Localization in Wireless Sensor Networks”, in Proceedings of the 2012 IEEE Radio and Wireless symposium, Santa Clara, CA, Jan. 2012.

3.        Z. X. Luo, “ Robust Energy-based Target Localization in Wireless Sensor Networks in the Presence of Byzantine Attacks”, International Journal of Innovative Technology and exploring Engineering, vol. 1, no.3, Aug. 2012.

4.        Z. X. Luo, “A New Direct Search Method for Distributed Estimation in Wireless Sensor Networks”, International Journal of Engineering and Advanced Technology, vol. 1, no. 4, Sept. 2012.

5.        Z. X. Luo, and T. C. Jannett, “Energy-Based Target Localization in Multi-Hop Wireless Sensor Networks”, in Proceedings of the 2012 IEEE Radio and Wireless symposium, Santa Clara, CA, Jan. 2012.

6.        L. Zuo, R. Niu and P. K. Varshney, "Conditional Posterior Cramér–Rao Lower Bounds for Nonlinear Sequential Bayesian Estimation," IEEE Trans. Signal Process., vol.59, no.1, pp.1-14, Jan. 2011.

7.        E. Masazade, R. Niu, P. K. Varshney, M. Keskinoz,  ''Energy Aware Iterative Source Localization Schemes for Wireless Sensor Networks'', IEEE Trans. Signal Process., vol.58, no.9, pp.4824-4835, Sept. 2010.

8.        D. Chen, C. K. Mohan, K. G. Mehrotra, and P. K. Varshney, "Distributed in-network path planning for sensor network navigation in dynamic hazardous environments," Wirel. Commun. Mob. Comput., July 2010.

9.        H. Chen and P. K. Varshney, "Nonparametric quantizers for distributed estimation", IEEE Trans. Signal Process., vol 58, no 7, pp. 3777-3787, July 2010.

10.     Engin Masazade, Ramesh Rajagopalan, Pramod K. Varshney, Chilukuri Mohan, Gullu Kiziltas Sendur, and Mehmet Keskinoz, “A Multi-objective Optimization Approach to Obtain Decision Thresholds for Distributed Detection in Wireless Sensor Networks," IEEE Transactions on Systems, Man, and Cybernetics - Part B, Vol. 40, No. 2, April 2010.

11.     Z. X. Luo and T. C. Jannett, “Optimal threshold for locating targets within a surveillance region using a binary sensor network”, in Proc. of the International Joint Conferences on Computer, Information, and Systems Sciences, and Engineering (CISSE 09), Dec. 2009.

12.     Z. X. Luo and T. C. Jannett, “A multi-objective method to balance energy consumption and performance for energy-based target localization in wireless sensor networks”, in Proc. of the 2012 IEEE SoutheastCon, Orlando, FL, Mar. 2012.

13.     Z. X. Luo and T. C. Jannett, “Performance comparison between maximum likelihood and heuristic weighted average estimation methods for energy-based target localization in wireless sensor networks”, in Proc. of the 2012 IEEE SoutheastCon, Orlando, FL, Mar. 2012.

14.     Z. X. Luo, “A censoring and quantization scheme for energy-based target localization in wireless sensor networks”, Journal of Engineering and Technology, vol.2, no.2, Aug. 2012

15.     Z. X. Luo, “A coding and decoding scheme for energy-based target localization in wireless sensor networks”, International Journal of Soft Computing and Engineering (IJSCE), vol.2, no. 4, Sept. 2012

16.     O. Ozdemir, R. Niu, and P. K. Varshney, "Tracking in wireless sensor networks using particle filtering: Physical layer considerations," IEEE Trans. Signal Process., vol.57, no. 5, pp. 1987-1999, May 2009  Description: stu04-fsrv.ad.syr.eduvempaty$Desktopieeexplore.gif

17.     O. Ozdemir, R. Niu, and P. K. Varshney, "Channel aware target localization with quantized data in wireless sensor networks," IEEE Trans. Signal Process., vol. 57, no. 3, pp. 1190-1202, March 2009.

18.     D. Chen and P. K. Varshney, "A survey of void handling techniques for geographic routing in wireless networks," IEEE Communications Surveys and Tutorials, vol. 9, pp. 50-67, First Quarter, 2007

19.     Z. X. Luo, “Distributed Estimation in Wireless Sensor Networks with Heterogeneous Sensors”, International Journal of Innovative Technology and Exploring Engineering, vol. 1, no.4, Sept. 2012
20.     Z. X. Luo, “Overview of Applications of Wireless Sensor Networks”, International Journal of Innovative Technology and Exploring Engineering (IJITEE), vol. 1, no. 4, Sept. 2012
21.     Z. X. Luo, “Parameter Estimation in Wireless Sensor Networks with   Normally Distributed Sensor Gains”, International Journal of Soft Computing and Engineering, vol. 2, no. 6, Feb. 2013.

22.     D. Chen, J. Deng, and P. K. Varshney, "Selection of a forwarding area for contention-based geographic forwarding in wireless multi-hop networks," IEEE Trans. Veh. Technol., vol. 56, pp. 3111-3122, Sept. 2007.

23.     Z. X. Luo, “Parameter Estimation in Wireless Sensor Networks Based on Decisions Transmitted over Rayleigh Fading Channels”, International Journal of Soft Computing and Engineering, vol. 2, no. 6, Jan. 2013.

24.     Z. X. Luo, “Distributed Estimation and Detection in Wireless Sensor Networks”, International Journal of Inventive Engineering and Sciences, vol. 1, no. 3, Feb. 2013.

25.     L. Snidaro, R. Niu, G. L. Foresti, and P. K. Varshney, "Quality-based fusion of multiple video sensors for video surveillance," IEEE Trans. Syst., Man, Cybern. B, vol. 37, pp. 1044-1051, Aug. 2007.





Nasim A Shah, Nandana Prabhu

Paper Title:

Performance Analysis of Control Parameters of Artificial Bee colony Algorithm for JPEG Images

Abstract: The technological advancement and innovations needs more bandwidth, large capacities and high performance devices. Compression on digital images plays an important role in data compression as a typical multimedia technique. Wavelet Packet Decomposition is one of the image compression technique in which both approximation and detail coefficients of an image are extracted repeatedly up to a filtering level.  Deciding the best topology of the wavelet packets can be considered as a structural optimization problem. Swarm intelligence has been popularly used for solving the optimization problems: Artificial Bee Colony (ABC) is the most recently proposed algorithm based on the systematic foraging behavior of honey bees. In this paper Wavelets Packet Decomposition is applied to JPEG images using various Wavelet families. Once coefficients are generated, the optimum threshold values are determined using Artificial Bee Colony (ABC) algorithm to obtain the best reconstructed image. The results are compared on the basis of some control parameters. It is observed that Wavelet Packet optimization using Daubechies filter is better that the other filters.

Artificial Bee Colony Algorithm (ABC), Ant Colony Optimization (ACO), Particle Swarm Optimization (PSO), Wavelet Packet Decomposition (WPD).


1.        R.R. Coifman and M.V. Wickerhauser, Entropy-based algorithms for best basis selection, IEEE Transactions on Information Theory 38 (1992), no. 2, 713–718.
2.        Vinay U. Kale1 & Nikkoo N. Khalsa2 Performance Evaluation of Various Wavelets for Image Compression of Natural and Artificial Images International Journal of Computer Science & 180 Communication (IJCSC), Vol. 1, No. 1, January-June 2010, pp. 179-184

3.        Z. Wang, A. C. Bovik, H. R. Sheikh, and E. P. Simoncelli, Image quality assessment: From error measurement to structural similarity, IEEE Transactions on Image Processing 13 (2004), no.1, 600–612.

4.        F. G. Meyer, A. Z. Averbuch, and J-O Strmberg, Fast adaptive wavelet packet image compression, IEEE Transactions on Image Processing 9 (2000), no. 5,792–800.

5.        D. Karaboga, An idea based on honey bee swarm for numerical optimization, Tech. Report TR06, Erciyes University, Engineering Faculty, Computer Engineering Department, 2005.

6.        D. Karaboga, B. Basturk: A powerful and efficient algorithm for numerical function optimization: artificial bee colony (ABC) algorithm, Journal of Global Optimization, Vol. 39, 2007, pp. 459-471.

7.        D. Karaboga, B. Basturk, Artificial bee colony (ABC) optimization algorithm for solving constrained optimization problems, LNCS: Advances in Soft Computing: Foundations of Fuzzy Logic and Soft Computing, 2007, pp. 789–798

8.        B Akay, D Karaboga - Information Sciences, A modified Artificial Bee Colony algorithm for real-parameter optimization 2012 – Elsevier, Department of Computer Engineering, Erciyes University, 38039 Melikgazi, Kayseri, Turkey

9.        B. Akay and D. Karaboga, Wavelet packets optimization using artificial bee colony algorithm, CEC 2011, 2011, pp. 89–94.





K. Sai Krishna Chaitanya, E. Lokesh Reddy, P. V. Praneeth Reddy

Paper Title:

Generating Dual Tone for Creating Our Own Communication Channel

Abstract: When we dial land number or Mobile number on our phones , it gives a ring to the person we need to contact, this is possible by the concept of DUAL TONE – MULTIPLE  FREQUENCY (DTMF). The DTMF is a popular signalling method between telephone and switching centres .It is also used for signalling between the telephone network and computer network. DTMF signals are the superposition of two sine waves with different frequencies. In this the key stroke we give is converted to frequency  and  this sine wave is decode by the decoder  and switching centre connects our line to the desired destination. In recent days when we call to customer care , instead of person of person computer is able to solve our query ,this is possible by programming the sound card of computer with the frequencies generated by phone. This paper mainly deals about dtmf, their working, verification using mat lab and their application.

Dual Tone Multiple Frequency, Rotary Dial, Encoding, Decoding.


1.        Schenker, L (1960), "Pushbutton Calling with a Two-Group Voice-Frequency Code"
2.        ITU's recommendations for implementing DTMF services (PDF)

3.        Pushbutton Calling with a Two-Group Voice-Frequency Code - The Bell system technical journal (ISSN 0005-8580) Schemer yr:1960 vol:39 iss:1 pg:235-255

4.        Frank Durda, Dual Tone Multi-Frequency (Touch-Tone®) Reference, 2006.





Shweta Rathour

Paper Title:

Review of 3-D Secure Protocol

Abstract: Banks worldwide are starting to authenticate online card transactions using the `3-D Secure' protocol, which is branded as Verified by Visa and MasterCard Secure Code. This has been partly driven by the sharp increase in online fraud that followed the deployment of EMV smart cards (EMV comes from the initial letters of Euro-pay, MasterCard, VISA) for cardholder-present payments. 3-D Secure has so far escaped academic scrutiny; yet it might be a textbook example of how not to design an authentication protocol. It ignores good design principles and has significant vulnerabilities, some of which are already being exploited. Also, it provides a fascinating lesson in security economics. While other single sign-on schemes such as OpenID, InfoCard and Liberty came up with decent technology they got the economics wrong, and their schemes have not been adopted. 3-D Secure has lousy technology, but got the economics right (at least for banks and merchants); it now boasts hundreds of millions of accounts. The 3-Domain Secure protocol specification defines an architecture and protocol for verifying cardholder account ownership during a purchase transaction in the remote environment. After initiating the final purchase action, the cardholder is placed into a dialog with his issuing financial institution. The Issuer authenticates the cardholder and sends a confirmation of identity back to the merchant; the merchant completes the transaction.

Access Control Server (ACS), Address Verification Service (AVS), Payment Cards Industry Data Security Standard (PCIDSS), SSL/TLS Secure Socket Layer/Transport Layer Security, Secure Electronic Transaction (SET).


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7.        Internet Retailer. Veri_ed by Visa security program used as bait in phishingscams,6January2005. http://www.internetretailer.com/dailyNews.asp?id=13764.

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9.        Mohammed Assora and Ayoub Shirvani “Enhancing the Security and Efficiency of DSecure“ Information Security Lecture Notes in Computer Science, 2006, Volume 4176/2006, 489-501, DOI: 10.1007/11836810_35

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11.     RBS Secure Terms of Use, December 2009. https://www.rbssecure.co.uk/rbs/ tdsecure/terms_of_use.jsp.

12.     Saar Dimmer, Steven J. Murdoch, and Ross Anderson. Optimized to fail: Card readers for sonline banking. In Financial Cryptography, LNCS 5628. Springer, 2009. EMVCo, LLC. EMV 4.1, June 2004. http://www.emvco.com/.






Ka. Selvaradjou, V. Rajesh

Paper Title:

Energy Efficient Routing Protocol with Real-Time Packets Delivery in Wireless Sensor and Actor Networks

Abstract: Wireless Sensor and Actor Networks (WSANs) are heterogeneous form of Wireless Sensor Networks(WSNs) with nodes of differing capabilities. Sensor nodes are small and static devices with limited power, computation, and communication capabilities that are largely used in environmental monitoring applications. The actor nodes are relatively resource rich nodes that can move and perform appropriate actions. The combination of these types of nodes brings closed loop operation in the monitoring applications. There are three specific challenges in WSAN: (i) delivery of the event detection report to the actor within a specified deadline, (ii) energy constrains of the sensor nodes and (iii) the reliable delivery of the sensed report. In this paper we propose a real-time, energy aware, routing protocol. Our protocol works in three phases: (i) route establishment, (ii) route maintenance and (iii) route deletion. During the establishment of routes between sensors and actors, the RREQ control packet is embedded with the information such as route, remaining power level, average traffic and current time, At the destination, the route with the maximum remaining power is chosen for transmission. In the maintenance phase, if any intermediate link fails, then RREQ process takes place. The route deletion phase is entered, if the remaining power of a route is below a threshold, thus removing the route entry the routing table. While sending a packet, the node calculates the current remaining power of the route using the previously received packets from that route. If the current remaining power is below a threshold, then the route is not chosen for transmission, the node tries with other route or starts new route establishment process. In our protocol, the intermediate nodes forward the packet based on the deadline associated with them, thus making it suitable for real time nature of WSAN. The performance of the proposed protocols is evaluated through extensive simulations and compared with that of Ad hoc On Demand Distance Vector (AODV) and Greedy Rumor Forwarding Routing (GRFR) protocols in terms of packet delivery ratio, deadline miss ratio, and lifetime of the network.

Wireless Sensor Networks, energy efficiency, routing protocol.


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3.        Edith C. H. Ngai, Micheal R. Lyu, Jiangchuan Liu "A Real-Time Communication  Framework for Wireless Sensor-Actuator Networks ", in Proceedings of IEEE Aerospace Conference, 2006.

4.        IETF MANET Working Group, Available: http://www.ietf.org/html.charters/manet-charter.html, Mobile Ad Hoc Networks .

5.        L.Baroli, A. Koyama, N. Shiratoria, “QoS routing method for Ad-Hoc networks based on  genetic     algorithm”, in Proceedings of the 14th International Workshop on Database and Expert Systems Applications, September, 2003.

6.        T. He, J. Stankovic, C. Lu, and T. Abdelzaher, “SPEED: A real-time routing protocol for sensor networks,” in Proceedings of the IEEE International Conference on Distributed Computing Systems,  pp. 46–55, May, 2003.

7.        Arvind R. Sama and Kemal Akkaya in “Real-time Routing for mobile Sensor/Actor Networks”, in Proceedings of IEEE International Conference of Local Computer Networks (LCN), pp. 821 – 828, 2008.

8.        C. E. Perkins and E. M. Royer, “Ad hoc On Demand Distance Vector (AODV) algorithm,” in Proceedings of the 2nd IEEE Workshop on Mobile Computing Systems and applications (WMCSA’99), Feb. 1999.

9.        J. W. S. Liu, Real Time Systems. Prentice Hall, 2000.

10.     Jiming Chen, Jialu Fan, Xianghui Cao and Yousian Sun, “GRFR: Greedy  Rumor Forwarding Routing for Wireless Sensor / Actor Networks”, in Information Technology Journal, Asian Network for         Scientific Information, 2008.

11.     David. Braginsky and Deborah Estrin, “Rumor routing algorithm for sensor networks” in Proceedings of the 1st ACM international Workshop on Wireless Sensor Networks and Applications, pp. 22-31, 2002.






Paper Title:

Performance Comparison of Vedic Multiplier and Booth Multiplier

Abstract: The performance of the any processor will depend upon its power and delay. The power and delay should be less in order to get a effective processor. In processors the most commonly used architecture is multiplier. If the power and delay of the multiplier is reduced then the effective processor can be generated. In this paper Vedic Multiplier and Booth Multiplier are implemented on FPGA platform and comparative analysis is done. The comparison of these Architectures is carried out to know the best architecture for multiplication w. r. t. power and delay characteristics. The designs are implemented using VHDL in Modelsim 10.1 b and synthesis is done in Xilinx 8.2i ISE. 

Booth multiplier, Urdhva Tiryagbhyam, Vedic multiplier, Xilinx.


1.        R. P.Rajput and M. N. S. Swamy, ''High Seed Modified Booth Encoder multiplier for signed and unsigned numbers'', 14th Internaitonal Conference on Modeling and simulation, 2012 IEEE, pp. 649-654. 
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3.        J. Rao M, and S. Dubey, "A high speed and Area Efficient Booth Recoded Wallace tree Multiplier for fast Arithmetic Circuits," Asia Pacific Conference on postgraduate Research in Microelectronics & Electronics (PPIM EASIA) 2012.  

4.        Ch. H. Kumar "Implementation and Analysis of Power, Area and Delay of Array Urdhava, Nikhilam Vedic Multipliers, " Internatinal Journal of Scientific and Research Publications, Volume 3, Issue 1 January 2013, ISSN 2250 – 3153,pp.1-5.

5.        N. Mittal and A. Kumar, "Hardware Implementation of FFT using vertically and crosswise Algorithm",, International Journal of Computer Application (0975-8887), Volume-35- No-1, December 2011.

6.        L. Sriraman and T.N. Prabakar.'' Design and Implementation of two variable Multiplier using KCM and Vedic Mathematics”, 1st International Conference on Recent Advances in Information Technology, 2012 IEEE. 

7.        H. Thapliyal, M. B. Srinivas and H. R. Arabnia , "Design And Analysis of a VLSI Based High Performance Low Power Parallel square Architecture", in Proc. Int. Conf. Also. Math. Compo. Sc., Las Vegas, June 2005, pp. 72-76.

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9.        C. Ping-hua and Z. Juan, "High-Speed Parallel 32x32-bit Multiplier Using a Radix-16 Booth Encoder", Third International Symposium on intelligent Information Technology Application Workshop , 2009. IITAW 09, 21-22 Nov. 2009, pp.406-9.

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11.     A. Haveliya "A Novel Design for High Speed Multiplier .for Digital Signal Processing Applications (Ancient Indian Vedic mathematics approach)" International Journal of Technology And Engineering System(IJTES):Jan - March 2011- Vo12 .No. l, pp.27-31.

12.     H.S.Dhillon and A.Mitra "A Digital Multiplier Architecture using Urdhava Tiryakbhyam Sutra of Vedic Mathematics" IEEE Conference Proceedings,2008.

13.     P/ Mehta and D. Gawali "Conventional versus Vedic mathematical method for Hardware implementation of a multiplier",2009, International Conference on Advances in Computing, Control, and Telecommunication Technologies, pp. 640-42.

14.     H.  Thapliyal, S. Kotiyal and M.B. Srinivas, "Design and Analysis of a Novel Parallel Square and Cube Architecture Based on Ancient Indian Vedic Mathematics", Proceedings on 48th IEEE International Midwest Symp-osium on Circuits and Systems (MWSCAS 2005),Hyderabad,vol.2, pp.1462-65.S

15.     S.Akhtar, "VHDL Implementation of Fast NxN multiplier Base on Vedic Mathematics," Jaypee Institute of Information Technology University, Noida, 2011307 U.P, India, 2007 IEEE, pp. 472-75..

16.     P. Verma and K.K. Mehta, ''Implementation of an efficient multiplier based on Vedic Mathematics using EDA Tool'', International Journal of Engineering and Advance Technology (IJEAT) ISSN : 2249-8958, volume-1, Issue -5, June 2012, pp.75-79






Chanchal G. Agrawal, J. B. Kulkarni

Paper Title:

Security in WSN using Polynomial Pool Based Mechanism

Abstract: For efficient data accumulation, localized sensor reprogramming, and for distinguishing and revoking compromised sensor mobile sinks (MSs) are necessary in many wireless sensor network (WSN) applications, However, in sensor networks for pair wise key establishment and authentication between sensor nodes and mobile sinks exiting key predistribution schemes are used, the work of mobile sinks for data collection elevates a new security challenge: in the basic probabilistic and q-composite key pre distribution schemes, an attacker can easily obtain a large number of keys by tracing a small fraction of nodes, and hence, by deploying a replicated mobile sink preloaded with some compromised keys gain the control of overall network. A three-tier general framework describe that allow the use of any pair wise key pre distribution scheme as its basic component. This scheme requires two separate key pools, one for the mobile sink to access the network, and one for pair wise key establishment between the sensors. As compared to the polynomial pool-based scheme this security framework has higher network resilience to a mobile sink replication attack.

Wireless Sensor Network, Random Key Predistribution, Mobile Sink, Hash, Prime, Key Distribution Center.


1.        A.  Rasheed and R.Mahapatra, "An efficient key Idstribution Scheme for Establishing Pairwise Keys with a Mobile Sink in Distributed Sensor Networks", Proc.IEEE 27th Int'1 Performance Computing and Comm. Conf.(Ipccc '08),PP. 264-270, Dec.2008.
2.        A. Rasheed and R. Mahapatra, "A Key Pre-Distribution Scheme for Heterogeneous Sensor Networks", Proc. International Conf. Wireless Comm. and Mobile Computing Conf. (IWCMC ’09), pp. 263-268,June 2009.

3.        A. Rasheed and R. Mahapatra, "Three-Tier security scheme in wireless sensor network with mobile sink", IEEE Transaction on parallel and distributed system,vol-23,no.5,May-2012.

4.        A. Rasheed and R. Mahapatra,"Key predistribution schemes for establishing pairwise keys with a mobile sink in sensor network", IEEE Transaction on parallel and distributed system,vol-22,no.5,January 2011.

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6.        D. Liu, P. Ning, and R.Li. ,"Establishing Pairwise Keys in Distributed Sensor Networks", Proc. 10th ACM Conf. Computers and Comm. Security (CCS ’03), pp. 52-61, Oct. 2003.

7.        H. Chan, A. Perrig, and D. Song,"Random Key Pre-Distribution Schemes for Sensor Networks", Proc. IEEE Symp. Research in Security and Privacy, 2003.

8.        H. Chan, A. Perrig, and D. Song,"Key Distribution Techniques for Sensor Networks", Wireless Sensor Networks, pp. 277-303, Kluwer Academic, 2004.

9.        L. Eschenauer and V.D. Gligor,"Key-Management Scheme for Distributed Sensor Networks", Proc. ACM Conf. Computer Comm. Security (CCS ’02), pp. 41-47, 2002

10.     I.F. Akyildiz, W. Su, Y. Sankarasubramaniam, and E. Cayirci,,"Wireless Sensor Networks: A Survey", Computer Networks, vol. 38, no. 4, pp. 393-422, 2002.

11.     L. Lamport, “Password Authentication with Insecure Communication,” Comm. ACM, vol, 24, no. 22, pp. 770-772, Nov. 2982





Patil S. N, R. C. Prasad

Paper Title:

Designing the Stable Compensation Networks for Buck Boost Converter for Solar Energy System

Abstract: Because of combustion of fossil fuels global warming caused by environmental problems, the raising prices of crude oils and natural gases. They promote continuous effort to improve energy system and its efficiency. There is a need to search for abundant and clean energy sources due to the depleted and increasing prices of oil. Solar energy acts as an alternative renewable energy source. Photovoltaic cells are used as renewable energy system. Photovoltaic (PV) cells can be used to generate dc voltages and given to Buck boost converter. The buck boost converter output is given to battery to inverter and load. Buck boost converter gives constant output which will control by PWM controller and feedback control system. Feedback control system has compensation network with different types and parameters.  Depending upon parameters and controlling method, we have to decide stability analysis using Bode Plot. This analysis is carried out by using MATLAB software. It will be used to design buck boost converter with different parameters which gives constant output. It is helpful for optimizing feedback-loop design for the best transient response while maintaining a comfortable margin for stability. Design for highest gain and bandwidth feedback loop. It is useful to study different controlling methods and comparison. It is used to select switching frequency, power inductor, selecting capacitors and verify the quality of the output voltage, harmonic content of the output voltage.

Photovoltaic cell model, buck boost converter, compensation network, Design parameters, stability.  


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H. P. Narkhede

Paper Title:

Review of Image Segmentation Techniques

Abstract: Segmentation is nothing but making the part of image or any object. Pattern recognition and image analysis are the initial steps of image segmentation. In the computer vision domain and image analysis we can done important research topic in the segmentation of video with dynamic background. Image segmentation is most of judging or analyzing function in image processing and analysis. Image segmentation refers to partition of an image into different regions that are homogenous or similar and inhomogenous in some characteristics. Image segmentation results have an effect on image analysis and it following higher order tasks. Image analysis includes object description and representation, feature measurement. Higher order task follows classification of object.. Hence characterization, visualization of region of interest in any image, delineation plays an important role in image segmentation. Using the different algorithms the current methodologies of image segmentation is reviewed so that user interaction is possible for images. In this paper, the review of image segmentation is explained by using different techniques.

Image segmentation, image analysis.


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13.     Mei Yeen Choong, Wei Yeang Kow, Yit Kwong Chin, Lorita Angeline, Kenneth Tze Kin Teo, “Image Segmentation via Normalised Cuts and Clustering Algorithm”, 2012 IEEE International Conference on Control System, Computing and Engineering, 23 - 25 Nov. 2012, Penang, Malaysia

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S. C. Echezona, H. C. Inyiama

Paper Title:

Proposing a model of Inter-University Collaboration System Using Cloud Computing Infrastructure

Abstract: The need for research collaborations in Higher Educational and Further Educational world-wide gave rise to National Research and Education Network (NREN). In Nigeria however, many attempts towards the creation of NREN have been made. Some aimed at Development of a platform on which contents can be applied later, such as NUNet. Others were aimed at the development of in-house proprietary contents that may later be integrated with the platform being developed, such as, Nigeria Universities Management Information System (NUMIS). Despite the efforts expended, none of these projects could be fully realized. Uwadia C. et al, (2003), pointed out a number of risk factors that posed a serious challenge to realizing an integrated and sustained network for research and education. The researcher modeled a system based on public cloud that will handle problems of cost flights, expertise and availability, as well as, curb problems of project duration and Total Cost of Ownership (TCO).

NREN, Cloud Computing, Managed Computing, EDUroam, TCO.


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16.     Winkler, Vic (2011). Securing the cloud: Cloud Computer Security Technologies and Tactics.. Waltham, MA USA: Elsevier. pp. 59.ISBN Securing the Cloud Cloud Computer Security Techniques and Tactics.

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