A Review on Adder Design using QCA Systolic Array
Premila S1, T. Gunasekaran2
1Premila S, Student, Department of ECE, Vivekanandha College of Engineering for Women, Tamil Nadu, India.
2Dr. T. Gunasekaran, Prof., Department of ECE, Vivekanandha College of Engineering for Women, Tamil Nadu, India.
Manuscript received on January 02, 2015. | Revised Manuscript received on January 08, 2015. | Manuscript published on January 15, 2015. | PP: 41-44 | Volume-3 Issue-2, January 2015. | Retrieval Number: A0756123114/2014©BEIESP
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© The Authors. Published By: Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Quantum-dot cellular automata (QCA) are considered as an advanced technology compared to complimentary metal-oxide-semiconductor (CMOS) due to QCA’s merits. Many logical circuits are designed using QCA which consume low power and reduced area. Therefore our interest is on designing of adders using QCA. Thus we design adders and detailed simulation using QCAD designer is presented. The performance of proposed adder gives the better Delay performance compared to Ripple carry adder (RCA).
Keywords: Quantum-dot Cellular Automata, systolic array, matrix multiplier, Galois Field multiplier, coplanar crossing, multilayer crossover.